Summary
Researchers in IIT Delhi's Department of Electrical Engineering have developed a programmable micro-graphics processing unit (micro-GPU). They describe it as the first working, demonstrable GPU designed at an Indian university.
It is built for graphics and display tasks in low-cost embedded devices, such as industrial control displays, e-rickshaw navigation, educational e-readers and navigation terminals for small fishing boats, not for high-end AI computing.
The design currently runs on a Spartan-7 FPGA board, not as a finished silicon chip. The team plans an 8-16 core version, a compiler and graphics software and eventually a proof-of-concept chip made on a 65-nanometre process.
WHY IN NEWS FOR UPSC & STATE PCS
IIT Delhi announced the micro-GPU on September 25, 2026. The project was led by M.Tech students Nammi Akash and M. Ravi Teja under Professors Jayadeva and Kaushik Saha. The researchers stressed that India currently imports all its GPUs.
Standard News
Owning the Design Matters More Than Beating Nvidia
Here's what is actually happening. A GPU is a processor built to draw pixels on a screen very quickly by doing many small calculations at once. India imports every one it uses. IIT Delhi's team has not built a rival to the chips that train AI models.
It has built a small, programmable micro-GPU for devices whose screens simply need to work cheaply, such as an e-rickshaw's navigation display, a factory control panel or a fishing boat's navigation terminal. The main gain is ownership of the design.
India now has its own design for a basic graphics processor, in a category where it previously owned nothing.
How a Chip Design Becomes a Chip
Every chip goes through three stages and this one has completed only the first two.
- Design in RTL (Register Transfer Level). Engineers write a detailed description of how data moves between the chip's storage units, called registers and its logic. Think of it as the complete architectural drawing.
- Testing on an FPGA. An FPGA is a chip whose internal wiring can be reconfigured after manufacture. Loading the RTL onto a Spartan-7 FPGA makes it behave like the new processor, so the design can be tested on real hardware.
- Manufacture as an ASIC. The design is then made into permanent silicon, dedicated to one job. This is where cost per chip falls, speed rises and power use drops, but it requires expensive one-time manufacturing setup. A rough analogy: the FPGA is a working model built from LEGO and the ASIC is the same design cast in metal. The analogy has a limit. The FPGA is not a toy model. It runs the real logic. What it gives up is efficiency: it is slower, uses more power and costs more per unit than a dedicated chip.
Why a
65nm Chip Makes Sense The world's leading chips are made on the most advanced and most expensive, processes. The team is deliberately aiming at a mature 65-nanometre process, which is cheaper and widely available. For a display controller in a low-cost device, a 65nm chip is more than enough.
The target market is huge and price-sensitive: everyday Indian devices where a simple, affordable display is what matters.
The Distance Still to Travel
Credit should be kept in proportion. An FPGA demonstration is a real milestone, but it is not a product. Before the chip reaches an e-rickshaw, it still needs:
- the 8-16 core version the team is now exploring; - a compiler and graphics software toolchain, because hardware without software is unusable; - a 65nm ASIC tape-out, meaning the design is sent for manufacture, then tested and validated; - a partner willing to put it into real products. Each step costs money and many university chip projects stop between demonstration and manufacture.
Where India Stands
India has a large chip design workforce but owns few chip designs of its own. Work like this, at the university level, is how that begins to change: one owned design at a time, in categories that are fully imported today.
For the exam: judge semiconductor self-reliance by whether India owns the designs, not only by whether it has the most advanced factories and be clear about the gap between an FPGA demonstration and a commercial chip.
Quick Facts
Key numbers & takeaways — revise these first
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A GPU (graphics processing unit) is a processor built to draw images, video and graphics on a display by performing many calculations in parallel.
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IIT Delhi's micro-GPU is described as the first working, demonstrable GPU designed at an Indian university.
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The design was written in Register Transfer Level (RTL), which describes how data moves between a chip's registers and logic.
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It currently runs on a Spartan-7 FPGA (Field Programmable Gate Array), a chip that can be reconfigured after manufacture.
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An ASIC (Application Specific Integrated Circuit) is a chip manufactured for one dedicated purpose.
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The team is exploring an 8-16 core, vector-style architecture, with an optimised compiler and a graphics software toolchain.
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The long-term plan is a proof-of-concept chip made on a 65-nanometre process.
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Target uses are industrial displays, e-rickshaw dashboards, educational e-book readers and navigation terminals for small boats.
Connect the dots for your UPSC preparation.
Standard news covers the event. Log in to read our comprehensive analysis and uncover the hidden constitutional, structural, and ethical dimensions of this topic:
A plain-language walk through the three stages of chipmaking (RTL design, FPGA testing, ASIC manufacture) and exactly where this project stands.
Why a mature 65nm process suits India's market for low-cost embedded devices better than the most advanced chip processes.
A realistic assessment of the four hurdles between an FPGA demonstration and a commercial chip and why university projects often stall there.
How owning chip designs fits into India's wider semiconductor strategy and what policy support would carry this design to the market.
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